The COPPER project will provide a novel copper deposition process to overcome the limitations of currently employed interconnect formation processes enabling device scaling beyond the 32 nm technology node. COPPER will achieve the final goal through collaborations within a very strong consortium based on a team with outstanding scientific, engineering and manufacturing qualifications. In a first phase, electrolyte ingredients will be selected and experimentally verified, a deposition cell designed through modelling and simulation as well as new analytical techniques evaluated to enable adequate analysis of the deposited films. The second phase will focus on the development of the copper deposition process based on the findings from phase one with the additional support of micro-modelling and the process scaled and integrated into a 300mm proof-of-concept. In the third and final phase, the process will be integrated into a complete interconnect scheme, and optimized according to the industrial chip manufacturer’s needs. For more information please see www.copper-project.eu.

Technikon is the official coordinator of this 5.1 (five point one) million Euro R&D project.

In order to strengthen Europe’s leading position in high-speed, end-to-end, mobile network systems technology, the Multi-Base consortium has identified three main areas where research will have a major impact on the advancement of state-of-the-art technology and the emergence of a sound competitive and innovative environment for the European communications and services industry: multi-tasking radio, scalable reconfigurable multi processor technology (MPSOC frameworks) and algorithm/architecture co-design for maximum energy efficiency. The Multi-Base project objectives target the elimination of key technical and commercial barriers to ubiquitous broadband access by enabling efficient and sustainable disposition of operation and production factors as spectrum, power engineering cost and silicon process technology. Drawing on project research in these three areas, the Multi-Base consortium will demonstrate new handset baseband architectures that enable end-to-end interconnection of humans and devices, with ability to support tenfold scaling in the number of interoperating connectivity links at the same cost and power consumption as today’s technology. For more information please see www.multibase-project.eu.

Technikon is the official coordinator of this 5.3 (five point three) million Euro R&D project.

Development of hardware devices and software products is facilitated by a design flow, and a set of tools (e.g., compilers and debuggers), which automate tasks normally performed by experienced, highly skilled developers. However, in both hardware and software examples the tools are generic since they seldom provide specific support for a particular domain. The goal of this project is to design, develop and deploy a toolbox that will support the specific domain of cryptographic software engineering. Ordinarily, development of cryptographic software is a huge challenge: security and trust is mission critical and modern applications processing sensitive data typically require the deployment of sophisticated cryptographic techniques. The proposed toolbox will allow non-experts to develop high-level cryptographic applications and business models by means of cryptography-aware high-level programming languages and compilers. The description of such applications in this way will allow automatic analysis and transformation of cryptographic software to detect security critical implementation failures, e.g., software and hardware based side-channel attacks, when realizing low level cryptographic primitives and protocols. Ultimately, the end result will be better quality, more robust software at much lower cost; this provides both a clear economic benefit to the European industry in the short term, and positions it better in dealing with any future roadblocks to ICT development in the longer term. For more information please see www.cace-project.eu.

Technikon is the official coordinator of this 4.8 (four point eight) million Euro R&D project.

Trusted Computing has become an established technology for verification and implementation of integrity and security at personal computers. Similar requirements are also needed for embedded computing platforms which have alike trust and security problems due to the increasing complexity and therefore instability of operating systems and applications as well as connection to the Internet with its security dangers and attacks. Until now the TC standard is mainly targeted for PCs with their large resources of available code space, specific bus interfaces and large computing power which are not available with embedded platforms. As there are a much higher number of embedded computing platforms like PCs in the field, it becomes a necessity to adapt the current TC standard to embedded platforms. The project will make an systematic approach for the development of trusted embedded systems, consisting of hardware platforms with integrated trust components and also work on the necessary trusted operating systems: (A) Trusted hardware, Trusted Platform Module as VHDL design, which could adapted to different host systems together with processors supporting a trust architecture. (B) Trusted operating systems mainly based on the new virtualisation/hypervisor architecture which are already in use at the PC world. Adapting it to the specific requirements of small platforms and trusted modules. (C) Security layers for implementing easy accessible security mechanisms. (D) Trusted protocols: Elementary TC protocols like TSS (Host interface API) and TNC (trusted network connect, an advanced secure communication protocol) will be adapted for embedded platforms. (E) Application examples will give us feedback about available trust functionality, application friendliness and user requirements. For more information please see www.tecom-project.eu.

Technikon is the official coordinator of this 9.9 (nine point nine) million Euro R&D project.

The Open Trusted Computing (OpenTC) consortium is an R&D project focusing on the development of trusted and secure computing systems based on open source software. The project targets traditional computer platforms as well as embedded systems such as mobile phones. The goal of OpenTC is to reduce system-related threats, errors and malfunctions. The lack of platform security in today's computers has given rise to waves of successful attacks, resulting in severe damages to enterprises and potential failure of critical infrastructures. The OpenTC consortium will define and implement an open Trusted Computing framework. The architecture is based on security mechanisms provided by low level operating system layers with isolation properties and interfaces to Trusted Computing hardware. These layers makes it possible to leverage enhanced trust and security properties of the platform for standard operating systems, middleware, and applications. The suggested architecture is applicable to a wide range of platform types, e.g. servers, GRID technology, mobile phones and industrial automation. It provides basic building blocks for complex, distributed scenarios with inherent, multilateral trust and security capabilities. The framework will be built around the "Trusted Platform Module" (TPM) specified by the Trusted Computing Group (TCG) and the new generation of x86 CPUs from Intel and AMD To enable maximum community benefit, project results will be integrated in and distributed as Open Source software, supporting Linux in particular. The project aims to have first Open Trusted Computing prototypes available around the time when proprietary Trusted Computing operating systems and solutions are expected to hit the market. For more information please see www.opentc.eu.

Technikon is the official coordinator of this 17 (seventeen) million Euro R&D project.

Side-channel attack Resistant Design: The threat of side-channel attacks is of crucial importance when designing systems with cryptographic hardware or software. Especially smart cards and related micro-chip systems have shown considerable vulnerabilities in this respect. Side-channel attacks analyze and exploit the information produced by some system by, for example, measuring its power consumption or the electro-magnetic emanation of this system. From these traces the attacker can potentially make conclusions about the secret data involved in a computation inside the system. Meanwhile, simple power analysis (SPA), differential power analysis (DPA), and their related attacks, simple and differential electro-magnetic emanation analysis (SEMA, DEMA), became known to a broader public, and thus pose the biggest threat. In the following, we will refer to these side-channel analysis methods and related attacks by using the acronym SCA. In SCARD, we propose to enhance the typical micro-chip design flow – from high level system description over register transfer layer description down to gate level net lists, and finally placement & routing of the micro-chip – in order to provide a means for designing side-channel resistant circuits and systems. Moreover, we intend to study the whole phenomenon of SCA in a consistent manner, and will also provide appropriate analysis tools and design tools for the designer of secure systems. We consider these additional ingredients of the traditional design flow of micro-chips as necessary in order to enable the design of the next generation of secure and dependable devices. For more information please see www.scard-project.eu.

Technikon is the official coordinator of this four million Euro R&D project.

Trusted Computing is approaching the market rapidly. It is the future basis for enhanced security for PCs, servers and networks combining indivisible cryptographic hardware and software. AMD and INTEL are both closely working together with cryptographers on a global scale to create new CPUs and security hardened platforms for future Trusted Computing solutions. The common goal is to give security a quantum leap and to convincingly fight against Viruses, Phishing Attacks and Root-Kit tampering, currently plaguing IT products. Operating Systems like Microsoft Vista or Trusted Linux/Unix are security tampered with Trusted Computing technology. The TC-STUDY project combines the knowledge and know-how of a multidisciplinary team composed of: Technikon, coordinator of Europe’s largest EC funded security research projects, the institute for applied information processing and communication at Graz university of technology and the university of applied science, Fachhochschule Technikum Kärnten, with the course of public management. The common goal is to foster and extend Austria’s leading position in Europe in the eGoverment sector by building early awareness and migration strategies into the direction of trusted computing. Key-applications are analyzed throughout and potential risks are mitigated. The overall project goals of our project are:

a) Substantially increase the level of security and the security awareness of Austrian citizens and the national administration and hardening the security of critical IT infrastructure.

b) Analyse and prepare professional and efficient migration of the Austrian public IT infrastructure towards Trusted Computing security solutions.

The consortium expects, in addition to the mentioned aspects, positive impact on the Austrian security research. In particular we expect:

a) Increased activities on trusted Computing at Universities, Fachhochschulen and Research Institutions,

b) A Timely knowledge boost for Austrian IT Consultants, - and

c) Support for the incorporation of Trusted Computing principles at Austrian professional CRM, e-Government, and e-Banking Solution providers.

The TC-STUDY will foster and further extend the fruitful Austrian cooperation with the international Trusted Computing research community. The project is coordinated by TECHNIKON Forschungs- und Planungsgesellschaft mbH. Please send any request or investigation to kiras@technikon.com.

WiTEC Austria contributes together with partners from Spain, the Netherlands, Germany, Greece, Sweden, UK, Hungary and Estonia in the project “Tackling Stereotypes”, which lasts from December 2004 to February 2006. It is the aim of this project to improve women’s professional situation in Science, Engineering and Technology (SET) and academic sectors searching for the involvement, connexion and cooperation of key agents in academy, business and the social actors in each national environment. The research is carried out on the industrial and the academic level, which are also the target addresses for the results evolving of the project. Therefore, the partners explore the reasons explaining the fact that women are under-represented in some SET sectors on these areas through the research of the depictions of stereotypes regarding women in SET in the European countries. This will be followed by a research on existing best practices on a national level.
Technikon is partner in this European project.

The Trusted and Secured Computing (TSC) project aims at developing a family of HW/embedded SW silicon components enforcing secure and trusted computing in the Consumer, Computer, Telecommunications and Wireless areas. It also intends to develop and promote a family of relevant European standards while keeping inter-operability with existing US-led or Asian initiatives.
Technikon is research partner in TSC and provides secure collaboration tools for the consortium.

High Yield driven MaNufacturing Excellence in the production of sub 65-nm CMOS devices: The primary objective of the HYMNE project is to develop methods, software and hardware that will permit the European IC manufacturing industry to enhance production cycle time and device yield and hence to significantly gain in competitiveness in advanced technology manufacture. The ambition of the project consortium is to demonstrate that for latest generation (less than 65 nm) complex CMOS technology it will be possible to shorten development cycles and to obtain a device yield better than 80 percent within 12 months after ‘first silicon out’ and also that by intelligent Fab re-thinking, the cycle time can be reduced from 2 to 1.0 days per mask layer for standard lots and from 0.75 to 0.35 for fast prototyping in a running 300-mm wafer fab. The consortium includes main European device manufacturers (ST, Philips, Atmel), suppliers of source materials (Air Liquide), suppliers of equipment, auxiliary hardware and software and of facilities to the semiconductors industry (FEI, SEZ, SIAutomation,..) and renowned European institutes and laboratories (FhG-IISB, LETI, Universities in NL and F).
Technikon provides secure collaboration tools for the consortium.